bhagavan krishna cv - copy

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Bhagavan Krishna Email: [email protected] City : Delhi Date of Birth: 05 September 1993 Mobile: 08010759840, 07520181217 Gender: Male CAREER OBJECTIVE To work for an organization where I can apply my knowledge and leverage my skills for organizational and personal growth. EDUCATIONAL QUALIFICATION Degree Institute/ Board Year Percentage M.tech(VLS I) Sharda University , Gr. Noida 2015 8.2(CGPA) B.tech (ECE) G.B.T.U, Lucknow (formaly UPTU) 2013 68.8 % Class XII U.P. Board ,Allahabad 2009 67.6% Class X U.P.Board ,Allahabad 2007 63.3% EXPERIENCE: 1 year experience in DKOP Labs Pvt. Ltd, Noida as an VLSI Trainee from August 2015 to August 2016. TECHNICAL SKILLS HDL: Verilog HDL, System Verilog. Bash Scripting, TCL (Basic). FPGA Implementation. VLSI Tools: Xilinx, Modelsim, Questa, NC Sim, Encounter, OR-CAD, P-SPICE, Micro wind, DSCH, Kiel. Operating Systems: Windows and Linux (Basic). M.TECH PROJECTS

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Page 1: Bhagavan krishna CV - Copy

Bhagavan Krishna Email: [email protected] City : Delhi

Date of Birth: 05 September 1993 Mobile: 08010759840, 07520181217

Gender: Male

CAREER OBJECTIVE

To work for an organization where I can apply my knowledge and leverage my skills for organizational and

personal growth.

EDUCATIONAL QUALIFICATION

Degree Institute/ Board Year Percentage

M.tech(VLSI) Sharda University , Gr. Noida 2015 8.2(CGPA)

B.tech (ECE) G.B.T.U, Lucknow

(formaly UPTU)

2013 68.8 %

Class XII U.P. Board ,Allahabad 2009 67.6%

Class X U.P.Board ,Allahabad 2007 63.3%

EXPERIENCE:

1 year experience in DKOP Labs Pvt. Ltd, Noida as an VLSI Trainee from August 2015 to

August 2016.

TECHNICAL SKILLS

HDL: Verilog HDL, System Verilog. Bash Scripting, TCL (Basic). FPGA Implementation.

VLSI Tools: Xilinx, Modelsim, Questa, NC Sim, Encounter, OR-CAD, P-SPICE, Micro wind, DSCH, Kiel.

Operating Systems: Windows and Linux (Basic).

M.TECH PROJECTS

Title 1: VLSI Design of mixed radix 128-point pipelined FFT processor for wireless communication.

Tools/Technology: Xilinx and Encounter.

My role: Programming and analysis of Verilog code.

Title 2: Design of high speed low power digital circuit by using floating gate MOS (FGMOS)

technology.

Tool: OR-CAD / PSpice

My role: Design some digital circuits and analysis the power.

Page 2: Bhagavan krishna CV - Copy

B.TECH PROJECT

Title1: RFID based security system.

Tools: Kiel, Micro-vision, Proteus.

My role: code simulation and hardware design.

OTHER PROJECTS

Title 1: RTL design and FPGA implementation of LZW algorithm for image processing.

Tools: Xilinx ISE 14.1, Matlab, Modelsim.

My role: RTL coding and synthesis.

Title 2: RTL design of Inter-Integrated Circuit (I2C) bus protocol.

Tools: Xilinx ISE 14.1.

My role: RTL coding and synthesis.

SUMMER TRAININGS

Four weeks training from DLW, Varanasi (U.P.) in 2011.

Four weeks training from DUCATE (Noida) in embedded system.

ACHIEVEMENTS

Two months workshop on Microwave [SAR] Remote Sensing for Natural Resources, Jointly

Organized by Sharda University and IIRS Dehradun.

One day seminar on Next Generation Network, organized 18th October 2014 by Sharda University.

PERSONAL DETAILS

Nationality - Indian Sex - Male Date of Birth - 05 Sept. 1993. Permanent Address - Vill.- Alampur, Post- Niloi , Tahsheel- Jaswant Nagar, Distt.-

Etawah, Pin code- 206245. Languages Known - Hindi, English.

DECLARATION

I hereby declare that the information given above is true to the best of my knowledge.

Bhagavan Krishna

Place: Delhi Dated: 01 st Nov. 2016