chb0911008 srikanth s s
TRANSCRIPT
-
7/31/2019 Chb0911008 Srikanth s s
1/6
M S RAMAIAH SCHOOL OF ADVANCED STUDIES [PEMP]
ESD-524 SYSTEM ON PROGRAMMABLE CHIP Page 1
Name SRIKANTH S S
Registration No. CHB0911008
Course M.sc [Engg.] RTES
Module Leader Sanket Dessai
Module Code & Module Name ESD524 System On Programmable Chip
-
7/31/2019 Chb0911008 Srikanth s s
2/6
M S RAMAIAH SCHOOL OF ADVANCED STUDIES [PEMP]
ESD-524 SYSTEM ON PROGRAMMABLE CHIP Page 2
Design and Verification of 8-bit ALU
ALU: It is a device that can be used to perform Arithmetic and Logical operations on the binary
data. It performs addition, OR, AND, XOR operations.
Design Logic of 8-bit ALU:
8-bit ALU consists of
X and Y: 8 bit inputs O : 8 bit output
S : 3 bit control signal or select line
Error! No text of specified style in document.1 Block Diagram
Of 8-bit ALU
x[7:0]
y[7:0]
O[0]
O[0]
O[7]
O[1]
O[2]
O[3]
O[4]
O[5]O[6]
S[0]
S[1]
S[2]
-
7/31/2019 Chb0911008 Srikanth s s
3/6
M S RAMAIAH SCHOOL OF ADVANCED STUDIES [PEMP]
ESD-524 SYSTEM ON PROGRAMMABLE CHIP Page 3
Code:
library IEEE;use IEEE.STD_LOGIC_1164.ALL;use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity ssalu8 is
port( x: in std_logic_vector(7 downto 0);
y: in std_logic_vector(7 downto 0);
S: in std_logic_vector(2 downto 0);O: out std_logic_vector(7 downto 0)
);
end ssalu8;
architecture Behavioral of ssalu8 is
begin
process(x,y,S)
begincase S is
when "000" =>
O
O O
O O
O O
O
O
-
7/31/2019 Chb0911008 Srikanth s s
4/6
M S RAMAIAH SCHOOL OF ADVANCED STUDIES [PEMP]
ESD-524 SYSTEM ON PROGRAMMABLE CHIP Page 4
Test Vector and simulation:
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;USE IEEE.STD_LOGIC_TEXTIO.ALL;
USE STD.TEXTIO.ALL;
ENTITY ssssa IS
END ssssa;ARCHITECTURE testbench_arch OF ssssa IS
FILE RESULTS: TEXT OPEN WRITE_MODE IS "results.txt";
COMPONENT ssalu8
PORT (
x : In std_logic_vector (7 DownTo 0);y : In std_logic_vector (7 DownTo 0);
S : In std_logic_vector (2 DownTo 0);
O : Out std_logic_vector (7 DownTo 0)
);END COMPONENT;
SIGNAL x : std_logic_vector (7 DownTo 0) := "00000000";
SIGNAL y : std_logic_vector (7 DownTo 0) := "00000000";SIGNAL S : std_logic_vector (2 DownTo 0) := "000";
SIGNAL O : std_logic_vector (7 DownTo 0) := "00000000";
BEGIN
UUT : ssalu8
PORT MAP (x => x,
y => y,
S => S,
O => O
);
PROCESSBEGIN
-- ------------- Current Time: 800ns
WAIT FOR 800 ns;
x
-
7/31/2019 Chb0911008 Srikanth s s
5/6
M S RAMAIAH SCHOOL OF ADVANCED STUDIES [PEMP]
ESD-524 SYSTEM ON PROGRAMMABLE CHIP Page 5
Results:
Input waveform:
From the above waveform
X= 00000100
Y= 00100100
S=010 is chosen.
For above control signal S, The ALU performs OR operation. The output of this input test vector
is shown below.
-
7/31/2019 Chb0911008 Srikanth s s
6/6
M S RAMAIAH SCHOOL OF ADVANCED STUDIES [PEMP]
ESD-524 SYSTEM ON PROGRAMMABLE CHIP Page 6
Simulated result of 8-bit ALU
From Control signal S selected, The ALU perfomed OR operation. The output of operation is
O= 00100100
Conclusion:
The 8 bit ALU is designed and simulated to perform different arithmetic operations.